Dr. Pradeep Nalla
Dr. Pradeep Nalla
Publications
2009
Semiformal verification of temporal properties in automotive hardware dependent software
by Djones Lettnin, Pradeep Kumar Nalla, Jörg Behrend, Jürgen Ruf, Joachim Gerlach, Thomas Kropf, Wolfgang Rosenstiel, Volker Schönknecht, and Stephan ReitemeyerIn DATE, pages 1214-1217, 2009. [BIB]
@inproceedings{2009,
author = {Lettnin, Djones and Nalla, Pradeep Kumar and Behrend, Jörg and Ruf, Jürgen and Gerlach, Joachim and Kropf, Thomas and Rosenstiel, Wolfgang and Schönknecht, Volker and Reitemeyer, Stephan},
title = {Semiformal verification of temporal properties in automotive hardware dependent software},
booktitle = {DATE},
year = {2009},
pages = {1214-1217}
}
2008
Verification of temporal properties in automotive embedded software
by Djones Lettnin, Pradeep Kumar Nalla, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel, Tobias Kirsten, Volker Schönknecht, and Stephan ReitemeyerIn Proceedings of the conference on Design, automation and test in Europe, pages 164–169, 2008. [BIB]
@inproceedings{lettnin2008verification,
title = {Verification of temporal properties in automotive embedded software},
author = {Lettnin, Djones and Nalla, Pradeep Kumar and Ruf, Jürgen and Kropf, Thomas and Rosenstiel, Wolfgang and Kirsten, Tobias and Schönknecht, Volker and Reitemeyer, Stephan},
booktitle = {Proceedings of the conference on Design, automation and test in Europe},
pages = {164–169},
year = {2008}
}
2007
Semiformal Verification of Temperal Properties in Embedded Software
by Djones Lettnin, Pradeep Kumar Nalla, J. R. R. Wess, Andreas Braun, Joachim Gerlach, Wolfgang Rosenstiel, and Thomas KropfIn 10. Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2007. [BIB]
@inproceedings{DPJRRAJTKaW2007,
author = {Lettnin, Djones and Nalla, Pradeep Kumar and Wess, J. R. R. and Braun, Andreas and Gerlach, Joachim and Rosenstiel, Wolfgang and Kropf, Thomas},
title = {Semiformal Verification of Temperal Properties in Embedded Software},
booktitle = {10. Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)},
year = {2007},
address = {Erlangen, Germany}
}
Grid Based Fast Falsification For Bounded Property Checking
by Pradeep Kumar Nalla, Jörg Behrend, Prakash M. Peranandam, Jürgen Ruf, Thomas Kropf, and Wolfgang RosenstielIn Forum on Specification & Design Languages (FDL), 2007. [BIB]
@inproceedings{PKJPMJTW2007,
author = {Nalla, Pradeep Kumar and Behrend, Jörg and Peranandam, Prakash M. and Ruf, Jürgen and Kropf, Thomas and Rosenstiel, Wolfgang},
title = {Grid Based Fast Falsification For Bounded Property Checking},
booktitle = {Forum on Specification & Design Languages (FDL)},
year = {2007}
}
2006
Fast Distributed Property Checking
by Pradeep Kumar Nalla, Prakash M. Peranandam, Jürgen Ruf, S. Laemmermann, Jörg Behrend, Roland Weiss, Thomas Kropf, and Wolfgang RosenstielIn Design Automation and Test in Europe (DATE), 2006. [BIB]
@inproceedings{PKPMJSJRTW032006,
author = {Nalla, Pradeep Kumar and Peranandam, Prakash M. and Ruf, Jürgen and Laemmermann, S. and Behrend, Jörg and Weiss, Roland and Kropf, Thomas and Rosenstiel, Wolfgang},
title = {Fast Distributed Property Checking},
booktitle = {Design Automation and Test in Europe (DATE)},
year = {2006},
month = {mar},
address = {University Booth},
month_numeric = {3}
}
Fast Falsification Based on Symbolic Bounded Property Checking
by Prakash M. Peranandam, Pradeep Kumar Nalla, Jürgen Ruf, R. J. Weiss, Thomas Kropf, and Wolfgang RosenstielIn 43rd Design Automation Conference (DAC), 2006. [BIB]
@inproceedings{PMPKJRJTW2006,
author = {Peranandam, Prakash M. and Nalla, Pradeep Kumar and Ruf, Jürgen and Weiss, R. J. and Kropf, Thomas and Rosenstiel, Wolfgang},
title = {Fast Falsification Based on Symbolic Bounded Property Checking},
booktitle = {43rd Design Automation Conference (DAC)},
year = {2006}
}
2005
Bounded Property Checking with SymC
by Pradeep Kumar Nalla, Prakash M. Peranandam, Jürgen Ruf, Roland Weiss, Thomas Kropf, and Wolfgang RosenstielIn Design Automation and Test in Europe (DATE), 2005. [BIB]
@inproceedings{PKPMJRTW032005,
author = {Nalla, Pradeep Kumar and Peranandam, Prakash M. and Ruf, Jürgen and Weiss, Roland and Kropf, Thomas and Rosenstiel, Wolfgang},
title = {Bounded Property Checking with SymC},
booktitle = {Design Automation and Test in Europe (DATE)},
year = {2005},
month = {mar},
address = {University Booth },
month_numeric = {3}
}
Symbolic bounded property checking in parallel
by Pradeep Kumar Nalla, R. J. Weiss, Prakash M. Peranandam, Jürgen Ruf, Thomas Kropf, and Wolfgang RosenstielIn In 4th International Workshop on Parallel and Distributed Methods in Verification, Electronic Notes in Theoretical Computer Science. Elsevier, 2005. [BIB]
@inproceedings{PKRJPJTW2005,
author = {Nalla, Pradeep Kumar and Weiss, R. J. and Peranandam, Prakash M. and Ruf, Jürgen and Kropf, Thomas and Rosenstiel, Wolfgang},
title = {Symbolic bounded property checking in parallel},
booktitle = {In 4th International Workshop on Parallel and Distributed Methods in Verification, Electronic Notes in Theoretical Computer Science},
publisher = {Elsevier},
year = {2005}
}
Parallel bounded property checking with SymC
by Pradeep Kumar Nalla, R. J. Weiss, Jürgen Ruf, Thomas Kropf, and Wolfgang RosenstielIn Modellierung und Verifikation, 8. GI/ITG/GMM Workshop, 2005. [BIB]
@inproceedings{PKRJJTW2005,
author = {Nalla, Pradeep Kumar and Weiss, R. J. and Ruf, Jürgen and Kropf, Thomas and Rosenstiel, Wolfgang},
title = {Parallel bounded property checking with SymC},
booktitle = {Modellierung und Verifikation, 8. GI/ITG/GMM Workshop},
year = {2005}
}
Overlap reduction in symbolic system traversal
by Prakash M. Peranandam, Pradeep Kumar Nalla, R. J. Weiss, Jürgen Ruf, Thomas Kropf, and Wolfgang RosenstielIn IEEE International High Level Design Validation and Test Workshop (HLDVT), 2005. [BIB]
@inproceedings{PMPKRJJTW2005,
author = {Peranandam, Prakash M. and Nalla, Pradeep Kumar and Weiss, R. J. and Ruf, Jürgen and Kropf, Thomas and Rosenstiel, Wolfgang},
title = {Overlap reduction in symbolic system traversal},
booktitle = {IEEE International High Level Design Validation and Test Workshop (HLDVT)},
year = {2005}
}